TR2005-036
Low Latency Decoding of EG LDPC Codes
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- "Low Latency Decoding of EG LDPC Codes", Journal of Lightwave Technology, Vol. 25, No. 9, September 2007. ,
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Research Area:
Abstract:
We describe simple interactive decoders for low-density parity check codes based on Euclidean geometries, suitable for practical VLSI implementation in applications requiring very fast decoders. The decoders are based on shuffled and replica-shuffled versions of iterative bit-flipping and quantized weighted bit-flipping schemes. The proposed decoders converge faster and provide better ultimate performance than standard bit-flipping decoders. We present simulations that illustrate the performance versus complexity trade-offs for these decoders. We can show in some cases through importance sampling that no significant error-floor exists.
Related News & Events
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NEWS Journal of Lightwave Technology: 2 publications by MERL researchers and others Date: September 1, 2007
Where: Journal of Lightwave TechnologyBrief- The articles "Low-Latency Decoding of EG LDPC Codes" by Zhang, J., Yedidia, J.S. and Fossorier, M.P.C. and "Low Latency Decoding of EG LDPC Codes" by Zhang, J., Yedidia, J.S. and Fossorier, M.P.C. were published in Journal of Lightwave Technology.