TR2008-015

Energy Efficient and High Speed On-Chip Ternary Bus

    •  Duan, C., Khatri, S.P., "Energy Efficient and High Speed On-Chip Ternary Bus", Design, Automation and Test in Europe, March 2008, pp. 515-518.
      BibTeX TR2008-015 PDF
      • @inproceedings{Duan2008mar,
      • author = {Duan, C. and Khatri, S.P.},
      • title = {Energy Efficient and High Speed On-Chip Ternary Bus},
      • booktitle = {Design, Automation and Test in Europe},
      • year = 2008,
      • pages = {515--518},
      • month = mar,
      • isbn = {978-3-9810801-4-8},
      • url = {https://www.merl.com/publications/TR2008-015}
      • }
  • Research Area:

    Communications

Abstract:

We propose two crosstalk reducing coding schemes using ternary busses. In addition to low power consumption and reduced delay, our schemes offer other advantages over binary coding schemes such as zero area overhead and simple, regular and fast CODEC design.

 

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