TR2018-075
An FPGA-based Multi-level All-Digital Transmitter with 1.25 GHz of Bandwidth
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- "An FPGA-based Multi-level All-Digital Transmitter with 1.25 GHz of Bandwidth", IEEE International Microwave Symposium (IMS), DOI: 10.1109/MWSYM.2018.8439490, June 2018, pp. 659-662.BibTeX TR2018-075 PDF Video
- @inproceedings{Dinis2018jun,
- author = {Dinis, Daniel and Ma, Rui and Teo, Koon Hoo and Orlik, Philip V. and Oliveira, Arnaldo and Vieira, Jose},
- title = {An FPGA-based Multi-level All-Digital Transmitter with 1.25 GHz of Bandwidth},
- booktitle = {IEEE International Microwave Symposium (IMS)},
- year = 2018,
- pages = {659--662},
- month = jun,
- doi = {10.1109/MWSYM.2018.8439490},
- url = {https://www.merl.com/publications/TR2018-075}
- }
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- "An FPGA-based Multi-level All-Digital Transmitter with 1.25 GHz of Bandwidth", IEEE International Microwave Symposium (IMS), DOI: 10.1109/MWSYM.2018.8439490, June 2018, pp. 659-662.
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Abstract:
This paper presents the first real-time FieldProgrammable Gate Array (FPGA)-based All-Digital Transmitter architecture with a usable bandwidth of 1.25 GHz. The proposed architecture was implemented and embedded into an FPGA, and the results surpass the reported state-of-the-art. Measurement results in terms of Signal-to-Noise Ratio (SNR) and Error-Vector Magnitude (EVM) are presented and discussed. Specifically, modulated signals of 1.25 GHz of bandwidth were successfully transmitted with 30.51 dB of SNR and 2.23% of EVM.